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Tokyo Electron Limited (ADR)
Information Technology · Semiconductors & Semiconductor Equipment
Structural: one of five WFE oligopolists ($ASML lithography, $AMAT/$LRCX/$KLAC/TEL everything else). Coater/developer is a near-monopoly (~90% share) - every EUV scanner ships with a TEL track, making TOELY a structural co-beneficiary of every $ASML EUV/High-NA placement.
S. supplier with full toolset breadth.
(1) HBM3E/HBM4 ramp lifts DRAM etch + deposition intensity 2-3x per wafer. (2) GAA transistor transition at N2/A14 ($TSM, $INTC 18A, Samsung) doubles etch + ALD steps. -export-restricted than $AMAT/$LRCX. (4) High-NA EUV ramp 2026-2028 = mandatory new track tools.
(5) Yen tailwind for USD-revenue Japanese exporters.
(1) WFE is cyclical - memory capex can collapse 40%+ peak-to-trough. (2) Customer concentration: top-3 ($TSM, Samsung, SK hynix) = ~50% of revenue. S. export controls - China revenue (~40%) is the bear-case overhang. (4) ASML High-NA delays push out coater/developer attach.
T listing.